Method for eliminating the zero point error in an iterative analog-digital converter
US4468651A · kind A · utility
7Cited by
6References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 21, 1981 |
| Grant date | Aug 28, 1984 |
| Priority date | — |
| Expiry date | Jul 21, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/74
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A zero equalization capacitor is connected to a first input of the comparator K, and at the beginning of the equalization phase, a voltage value of zero is placed at both comparator inputs, and a feedback network RN is connected between the comparator output and the capacitor, whereby the capacitor is charged to such a degree that the output signal of the comparator arrives at the decision threshold between the equality or inequality of the comparator inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.