High-speed MESFET circuits using depletion mode MESFET signal transmission gates
US4469962A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 26, 1981 |
| Grant date | Sep 4, 1984 |
| Priority date | — |
| Expiry date | Oct 26, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/186
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a circuit comprising (1) a logic element responsive to data of first and second negative voltage potentials, the logic element having a depletion mode MESFET data input gate, and (2) a depletion mode MESFET transmission gate operatively associated with the data input gate for enabling the selective serial transmission of data therethrough to the logic element in response to clock signals of third and fourth negative voltage potentials, the pinch-off threshold voltage of the data input gate being between approximately the first and second negative voltage potentials, the pinch-off threshold voltage of the transmission gate being between approximately the third and fourth negative voltage potentials, said third negative voltage potential being approximately equal to or more negative than said second negative voltage potential, said first negative voltage potential being more positive than said second negative voltage potential, and said fourth negative voltage potential being more negative than said third negative voltage potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.