Input current compensation circuit for superbeta transistor amplifier
US4471321A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 17, 1982 |
| Grant date | Sep 11, 1984 |
| Priority date | — |
| Expiry date | Dec 17, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/261
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved input current compensation circuit is provided for a superbeta transistor amplifier. The circuit has a pair of compensation transistors which simulate the amplifier transistors and support a base current which is mirrored back to the amplifier circuit to cancel the input currents thereof. The compensation transistors are supplied with base current by a control transistor. A special voltage control circuit is provided to establish controlled collector-emitter voltages for the compensation transistors independent of the control transistor, thereby decoupling the compensation transistors from the uncertain effects of the control transistor's base-emitter voltage. The control circuit is connected from the collector of one compensation transistor to the emitter of the other, and is provided with primary and secondary current sources to establish a current flow that sets up a desired bias for the control transistor and results in a near exact cancellation of input bias current. The application of the control circuit to both differential and operational amplifiers is illustrated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.