Dynamic MOS RAM with storage cells having a mainly insulated first plate

US4475118A · kind A · utility

Assignee

• NATIONAL SEMICONDUCTOR CORPORATION · US

Inventors

• Thomas Klein · Saratoga, US
• Charles E. Boettcher · Saratoga, US

Key dates

• Filing date: Dec 15, 1980
• Grant date: Oct 2, 1984
• Expiry date: Dec 15, 2000

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/30

Abstract

An improved dynamic MOS RAM having a plurality of selection lines and data lines and a plurality of storage cells connected thereto, wherein each storage cell includes a storage capacitor having first and second plates, wherein the second plate is adapted to be coupled to a reference potential terminal; and a MOSFET having a semiconductor substrate, a gate connected to one of the selection lines, a first conduction terminal coupled to one of the data lines, and a second conduction terminal connected in common with a first plate of the storage capacitor, is disclosed. The first plate of the storage capacitor includes first doped polysilicon conductive layer that has the majority of its area separated from the semiconductor substrate of the MOSFET by at least an insulating layer. The second plate of the storage capacitor includes a second doped polysilicon conductive layer that is at least coextensive with and insulated from the first conductive layer. The transistor gate is defined by a third doped polysilicon conductive layer that is insulated from the first and second conductive layers. Approximately 45% of the cell area can be utilized for charge storage, and only about 20% of th…