Patent · US Expired

Method and apparatus for a fast internal logic check of integrated circuits

US4477775A · kind A · utility

12Cited by
4References
11Claims
0Family size

Assignee

Inventor

Key dates

Filing dateDec 23, 1981
Grant dateOct 16, 1984
Priority date
Expiry dateDec 23, 2001

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB82Y15/00
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A method and apparatus for conducting a fast internal logic check of integrated circuits whereby the operations on all data lines of a data bus can be simultaneously represented employ a pulsed electron beam as a measuring probe, a scan generator for changing the position of the measuring probe, an evaluator for the potential-contrast signal, a computer or logic analyzer for evaluating the measured values, and a sequence control device for controlling the sequence of operation of the method and device. Given a fixed phase relation of the program cycle of the integrated circuit to be checked, the pulsed electron beam is successively directed to different test locations and the potential-contrast signal for each test location is registered and logically evaluated. The test results gained at the various phase relations are relayed to the logic analyzer and evaluated therein.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.