Semiconductor memory device
US4479200A · kind A · utility
15Cited by
1References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1982 |
| Grant date | Oct 23, 1984 |
| Priority date | — |
| Expiry date | Dec 27, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/415
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes at least, a memory cell including a first Schottky diode therein, a word line, a bit line, a first constant-current circuit for the word line, a second constant-current circuit for the bit line, and a bias circuit for biasing the first and second constant-current circuits. The bias circuit contains therein a second Schottky barrier diode. A forward voltage V.sub.F of the second Schottky barrier diode is substantially the same as that of the first Schottky barrier diode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.