Method for etching integrated semiconductor circuits containing double layers consisting of polysilicon and metal silicide

US4479850A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventors

• Willy Beinvogl · Munich, DE
• Barbara Hasler · Munich, DE

Key dates

• Filing date: Feb 17, 1984
• Grant date: Oct 30, 1984
• Expiry date: Feb 17, 2004

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/32137
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for etching a double layer semiconductor structure containing metal silicide layers or a metal silicide-polysilicon layer on a silicon substrate through a photoresist mask by means of reactive ion etching wherein dissociation and ionization of reactant gases take place in a plasma, the improvement which comprises: PA1 employing a mixture of chlorine gas and a highly reducing gas such as boron trichloride as the reactant gases.