Simple process for making complementary transistors

US4480375A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Peter E. Cottrell · South Burlington, US
• Henry J. Geipel, Jr. · South Burlington, US

Key dates

• Filing date: Dec 9, 1982
• Grant date: Nov 6, 1984
• Expiry date: Dec 9, 2002

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/981

Abstract

A very simple process is provided, with reduced processing time, for making a CMOS structure using a single polysilicon, or other refractory metal, layer which includes forming a thin gate oxide on both N and P type semiconductor layers of a common substrate, forming a gate electrode simultaneously on the N type and on the P type layers and selectively implanting an N type impurity to form N+ source and drain regions in the P type layer. The semiconductor layers are then oxidized to form substantially thicker oxide, such a silicon dioxide, adjacent to the sides of the gate electrode over the P type layer than the thickness of the oxide adjacent to the sides of the gate electrode over the N type layer. Without using a mask, a P type impurity is implanted into the N type layer to form P+ source and drain regions.