Fast parity checking in cache tag memory
US4483003A · kind A · utility
23Cited by
2References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 21, 1982 |
| Grant date | Nov 13, 1984 |
| Priority date | — |
| Expiry date | Jul 21, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0895
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A parity checking arrangement for tag information in a cache memory. Parity generation is performed on the input tag in parallel with tag memory lookup and then compared with the parity stored in tag memory in order to speed operation. A single parity generator also may be used for writing into tag memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.