Frequency shift key demodulator
US4486715A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 1982 |
| Grant date | Dec 4, 1984 |
| Priority date | — |
| Expiry date | Aug 4, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/144
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A frequency shift key demodulator produces an output data stream based upon whether a FSK modulated input signal has a frequency (f.sub.FSK) which is greater than or less than a reference frequency (f.sub.0) of a reference (REF) signal. The demodulator includes a sequence generator which generates a two bit binary code which represents the phase angle between the FSK and REF signals. The sequence of the code indicates the sign of the phase velocity between the FSK and REF signals. The demodulator also includes first and second sequence detectors, first and second integrating shift registers, and a decision circuit. The first sequence detector provides an output signal to the first shift register indicating that the FSK signal has a frequency less than the REF signal based upon detection of a first predetermined sequence of the code from the sequence generator. Similarly, the second sequence detector senses a second predetermined sequence of the code indicating that the FSK signal has a frequency greater than the REF signal and provides an output signal to the second shift register. At the end of a predetermined time period, the decision circuit compares the content of the first and…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.