Electronically programmable read only memory
US4488262A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 17, 1982 |
| Grant date | Dec 11, 1984 |
| Priority date | — |
| Expiry date | Jun 17, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically programmable read only memory assembly having cells arranged at the intersections of bit lines (BL1) and word lines (WL1, WL2), wherein each cell is formed of a bipolar transistor provided with a base region (70) and an emitter region (71) covered with a dielectric layer (2) made of an oxide or titanate of a transition metal. The cell in this condition represents a binary 0 information bit. The application of an appropriate voltage of approximately 4 volts to the pads of this cell through its corresponding bit line (BL1) and word line (WL2) causes the dielectric layer to break down and places the bit line in ohmic contact with the emitter, which sets the cell in its second condition representing a binary "1" information bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.