Multi-level communication circuitry for communicating digital signals between integrated circuits
US4489417A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 1982 |
| Grant date | Dec 18, 1984 |
| Priority date | — |
| Expiry date | Nov 24, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01825
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A communication circuit for transmitting multi-bit digital signals from one integrated circuit to another upon a single conductor utilizing a multi-level analog signal. The transmitting circuitry includes first through third drivers, only one of which is activated at any one time. The collector of an output transistor of a first of the drivers is coupled directly to the single bus conductor, the collector of an output transistor of the second driver is coupled to the bus through a single transistor, and the collector of an output transistor of the third driver is coupled to the bus through two series-connected diodes. The receiving circuitry is composed of three receivers, each including an input and output transistor pair coupled in a Darlington configuration. The base of the input transistor of the first receiver is coupled to the bus through a single diode connected in a first direction, the second receiver coupled to the input bus through a diode in a direction opposite the first direction, and the third receiver is coupled to the input bus via two series-connected diodes, this arrangement of diodes providing three different threshold voltage levels. The outputs of the three re…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.