Microprocessor with PLA adapted to implement subroutines
US4493029A · kind A · utility
9Cited by
4References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 14, 1982 |
| Grant date | Jan 8, 1985 |
| Priority date | — |
| Expiry date | May 14, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/223
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor includes a programmable logic array (PLA) adapted to allow "subroutines" or sequences within the PLA. The subroutines can be used by more than one opcode with a return performed to the opcode after execution of the subroutine.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.