Monolithically integrated semiconductor memory
US4498154A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 19, 1982 |
| Grant date | Feb 5, 1985 |
| Priority date | — |
| Expiry date | Jan 19, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4097
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Monolithically integrated semiconductor memory with a matrix of identical storage cells arranged rows and columns in the form of a coordinated MOS field-effect transistors and storage capacitors in the form of an MOS capacitor and wherein, also, a comparator and a comparison cell is formed of one of the storage cells are associated with each matrix column, including a method for bridging over a point of interruption in a course of a bit line extending from one to another of at least two adjacent storage cells of at least one column. The bridging method may be an MOS field-effect transistor having a current-carrying path over which the point of interruption is bridged.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.