Universal instrument flag receiver
US4500841A · kind A · utility
6Cited by
3References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 13, 1982 |
| Grant date | Feb 19, 1985 |
| Priority date | — |
| Expiry date | Sep 13, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/24
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A flag receiver circuitry for either a low level or a high level flag input is described. By utilizing the common mode rejection capability that must be incorporated in a differential flag receiver circuit, the same circuit can be connected as a single ended input receiver for a high level flag by effecting a clamp of the inverting input terminal voltage of the differentially configured operational amplifier employed to provide a high level flag trippoint output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.