Pulse stretching and level shifting circuit
US4501974A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 1982 |
| Grant date | Feb 26, 1985 |
| Priority date | — |
| Expiry date | Dec 13, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/04
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A pulse stretching integrated circuit includes an on-chip capacitor. A first transistor means including an input transistor and an emitter follower transistor supplies a charging current to the capacitor so as to charge it to a first voltage when an input signal pulse is in a first logical state. A differential transistor pair has a first input coupled to the emitter follower transistor and to the capacitor and has a second input coupled to a reference voltage for generating a first output when the capacitor voltage is less than the reference voltage and for generating a second output when the capacitive voltage is greater than the reference voltage. An additional transistor is coupled to the capacitor for discharging the capacitor when the input signal pulse is in a second logical state causing the voltage at the first input of the differential pair to fall below the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.