Concurrent network of reduction processors for executing programs stored as treelike graphs employing variable-free applicative language codes
US4502118A · kind A · utility
20Cited by
9References
12Claims
0Family size
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Key dates
| Filing date | Sep 7, 1983 |
| Grant date | Feb 26, 1985 |
| Priority date | — |
| Expiry date | Sep 7, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/17343
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure relates to a network of reduction processors for the evaluation of one or more functions which are stored in memory in the form of a series of nodes of a treelike graph where the nodes implement a variable-free applicative language. The respective function operators are reduced through a progressive series of transformations or substitutions until a result is obtained. During the reduction process, the processor transfers nodes to and from memory and performs various operations as required on those nodes. The processor can also create new nodes in memory and delete unused ones.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.