Consecutive identical digit suppression system in a digital communication system
US4502143A · kind A · utility
24Cited by
6References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 1982 |
| Grant date | Feb 26, 1985 |
| Priority date | — |
| Expiry date | Apr 19, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4906
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An encoder for suppression of a consecutive identical digit in a digital transmission system has been found for facilitating the reproduction of a clock signal for regenerating reception data, and keeping the average signal level constant. According to the present invention, a single bit (x) is inserted for every predetermined number (m) of input digits, and said insertion bit is a complement of a digit of previous k bits where k is an integer satisfying 1.ltoreq.k.ltoreq.m. Preferably, the value k is 1. The present invention is useful for digital communication higher than 100 Mbits/second, in particular, in optical communication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.