Low resistance buried power bus for integrated circuits
US4503451A · kind A · utility
32Cited by
10References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 1982 |
| Grant date | Mar 5, 1985 |
| Priority date | — |
| Expiry date | Jul 30, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a channel formed in one surface of a semiconductor substrate having a first conductivity, e.g. N type, a layer of material having a second conductivity type, e.g. P type boron, and a layer of relatively low resistance material such as Tungsten in contact with the first layer but insulated from the substrate. Second conductivity type tubs and the like can be formed adjacent the bus and in direct contact therewith through the first layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.