Input buffer circuit for receiving multiple level input voltages
US4504747A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 1983 |
| Grant date | Mar 12, 1985 |
| Priority date | — |
| Expiry date | Nov 10, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09425
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An input buffer circuit having a single input for receiving input voltages characterized by having varying voltage swings is provided. First and second inverter circuits having differing switchpoint voltages are coupled to a level shifting position. The level shifting portion varies the level of swing of the input voltage and buffers the input voltage. In one form, voltage coupling circuitry is interposed between the level shifting portion and a latching portion which provides the input voltage as an output signal at a predetermined voltage level. In another form, voltage coupling circuitry controlled by control circuitry couples the output of the level shifting portion to an output in response to the input voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.