Syndrome processing unit for multibyte error correcting systems
US4504948A · kind A · utility
26Cited by
4References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 29, 1982 |
| Grant date | Mar 12, 1985 |
| Priority date | — |
| Expiry date | Dec 29, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1833
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A syndrome processing unit for a multibyte error correcting system is disclosed in which logical circuitry for performing product operation on selected pairs of 8-bit syndrome bytes and exclusive-OR operations on selected results of the product operations are selectively combined to define usable cofactors that correspond to coefficients of an error locator polynomial corresponding to a selected codeword if the codeword contains less than the maximum number of errors for which the system has been designed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.