Method of fabricating a lateral PNP transistor
US4510676A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 1983 |
| Grant date | Apr 16, 1985 |
| Priority date | — |
| Expiry date | Dec 6, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A method for making a lateral PNP transistor simultaneously with an NPN transistor and the resultant device wherein a first mask defines a base-width by the resistor implant for a P-type resistor and a second mask is overlaid asymmetrically on said first mask to partially cover the collector. At the same time that the NPN extrinsic base contact is made, P-type dopants are introduced in the areas exposed by the first and second masks to provide an emitter and a collector contact for the PNP transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.