Digital processor with floating point multiplier and adder suitable for digital signal processing
US4511990A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Oct 15, 1981 |
| Grant date | Apr 16, 1985 |
| Priority date | — |
| Expiry date | Oct 15, 2001 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3856
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A signal processor having a wide dynamic range and which can process both data in the fixed point representation and data in the floating point representation by the use of a single floating-point arithmetic circuit is capable of processing digital signals, such as voice signals, at high speed and in real time. In addition, this signal processor is capable of executing data input/output operations with an external circuit in the data format of the fixed point representation and of performing internal operations in the floating point representation format. Further, conversion of an operational result from fixed point representation to floating point representation, and vice versa, can be performed internally in accordance with program instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.