Latch circuits with differential cascode current switch logic
US4513283A · kind A · utility
23Cited by
2References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 30, 1982 |
| Grant date | Apr 23, 1985 |
| Priority date | — |
| Expiry date | Nov 30, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/2885
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Latch circuits implemented in multiple level Cascode Current Switch logic for performing various complex latch functions including Level Sensitive Scan Design (LSSD) testing and implementable in VLSI technology are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.