Fabrication of FETs

US4514893A · kind A · utility

Assignee

• AT&T Bell Laboratories · US

Inventors

• Eliezer Kinsbron · Highland Park, US
• William T. Lynch · Apex, US
• Thomas E. Smith · Atlanta, US

Key dates

• Filing date: Apr 29, 1983
• Grant date: May 7, 1985
• Expiry date: Apr 29, 2003

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/0217

Abstract

A method of fabricating field effect transistors which includes control of threshold potential by an ion implantation limited to the active channel area. The active channel area is defined by a photoresist pattern. Ions are implanted into the exposed area in a concentration to achieve a desired threshold. Appropriate metals are deposited over the channel area to form a gate electrode. The photoresist is lifted off leaving the gate electrode in position over the channel area. If desired, a layer of polysilicon can be included prior to resist formation and later removed by an etchant which does not attack the gate electrode.