Bit compression coding with embedded signaling
US4516241A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 1983 |
| Grant date | May 7, 1985 |
| Priority date | — |
| Expiry date | Jul 11, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B14/068
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A bit compression coding circuit incorporates signaling bit insertion. An input signal sample(s) representing, for example, PCM encoded speech or voiceband data, is delivered to a difference circuit (31) where a predicted signal (s.sub.e) is subtracted from it. The predicted signal is an estimate of the input sample derived from a predictor (32). The resultant difference signal is coupled to the input of an adaptive quantizer (34) which provides at its output a bit compressed quantized differential PCM version of the difference signal. A multiplexer (37) receives the output of the quantizer and serves to periodically preempt the least significant bit of the bit compressed PCM signal and substitute a signaling bit therefor. The output of the multiplexer is coupled to the input of an adder (38) wherein it is added to the predicted signal. The result of this addition is coupled to the input of the predictor, which in response thereto serves to generate the next predicted signal for comparison with the next input signal sample. An adaptation control circuit (36) is responsive to the output of the multiplexer and serves to control the speed of adaptation of the adaptive quantizer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.