Patent · US Expired

Computer-based interlocking system

US4517673A · kind A · utility

18Cited by
5References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 28, 1982
Grant dateMay 14, 1985
Priority date
Expiry dateSep 28, 2002

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB61L2019/065
  • WIPO fieldTransport
  • WIPO sectorMechanical engineering

Abstract

An interlocking system comprising a plurality, e.g., three, of parallel sub-systems operating asynchronously to produce identical replicated outputs which are mutually compared to determine the correct output and disqualifying a minority output thereby ensuring high system integrity. Each sub-system includes a similar arrangement for computing the difference between all possible pairs of sub-systems. Comparison of these results with a reference table of all possible difference results and then comparison of the difference equations yields a common factor which is the sub-system producing the error. Action can then be taken to disqualify its output, e.g., by switching-off its power supply. A final output is taken, preferably from one sub-system, with a second as standby. To accomodate asynchronous running, a final output is only acted upon if it is repeated in a succeeding output cycle thus permitting opportunity to disqualify the preferred output if it is judged in error by the other sub-systems and to replace it by the standby.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.