MOS Transition detector for plural signal lines using non-overlapping complementary interrogation pulses
US4518872A · kind A · utility
6Cited by
5References
1Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 17, 1983 |
| Grant date | May 21, 1985 |
| Priority date | — |
| Expiry date | Feb 17, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1534
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The circuit provides a signal (a) at the application of an interrogation pulse (as) if a change of state has occurred in a one-out-of-n system until the instant of interrogation. Each signal (1 . . . n) of the system is assigned an arrangement having storage capability and comprising two inverters (i1, i2) with feedback and two series-connected transistors (t2, t3) which are both conducting at the instant of interrogation and, thus, produce an unambiguous signal level at a common load resistor (l) only if a change of state has occurred in the system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.