Zero-delay ramp generator
US4520276A · kind A · utility
3Cited by
3References
12Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 16, 1982 |
| Grant date | May 28, 1985 |
| Priority date | — |
| Expiry date | Sep 16, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K4/066
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An error amplifier receives an on/off signal and supplies an error signal to an integrator. The latter provides a ramp output, which is fed back to the error amplifier whereby the error signal therefrom further is dependent upon the ramp output. The error signal is selectively clamped positively and negatively whereby the resulting ramp output has a constant ramp time, with no ramp on/off delay.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.