Circuit and method for reducing non-linearity in analog output current due to waste current switching
US4521765A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 1983 |
| Grant date | Jun 4, 1985 |
| Priority date | — |
| Expiry date | May 4, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/785
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit digital to analog converter includes circuitry having first and second resistors in a R/2R resistor ladder which scales bit current contributions to an analog output current. Each of the first and second resistors have a respective terminal connected to the collector of a bit current transistor, the emitter of which is connected to the emitter of a waste current transistor. The digital to analog converter includes a metal ground voltage conductor having a "shared node" and a distributed resistance between one side of the shared node and a main ground voltage connection. The collector of the waste current transistor and a second terminal of the first resistor are both connected directly to the shared node. In operation, the waste current transistor switches waste current into the shared node, rather than into a separate waste current ground conductor. This results in substantially less voltage variation across the distributed resistance of the metal ground voltage conductor, and consequently lower non-linearity, than is the case if waste current is switched into the separate ground conductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.