Memory implant profile for improved channel shielding in electrically alterable read only memory semiconductor device

US4521796A · kind A · utility

Assignee

• General Instrument Corporation · US

Inventors

• Kamal Rajkanan · Fremont, US
• Jagir S. Multani · Dix Hills, US

Key dates

• Filing date: Nov 14, 1983
• Grant date: Jun 4, 1985
• Expiry date: Nov 14, 2003

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/69

Abstract

An Electrically Alterable Read Only Memory device including at least one cell in a substrate having source and drain channels with a memory gate region therebetween with the substrate in the memory gate region having therein a first impurity material of a first conductivity type to establish a desired write threshold voltage and a second impurity material of a second conductivity type opposite to said first type to tailor the surface concentration profiles of the impurity material in the memory gate region of the substrate.