Distributed arithmetic oversampling recursive digital filter
US4521866A · kind A · utility
Inventors
Key dates
| Filing date | Aug 17, 1981 |
| Grant date | Jun 4, 1985 |
| Priority date | — |
| Expiry date | Aug 17, 2001 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0444
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Distributed arithmetic oversampling recursive digital filter comprising a recursive part constituted by q registers of a circulating nature, a non-recursive part of order p constituted by series registers, a memory divided into N memory blocks, a modulo N counter with .alpha. outputs, an adder--subtracter connected to the memory, an accumulator register, and a frequency clock f.sub.s. The filter is characterized in that the non-recursive part only comprises K series registers, K being an integer defined by the double inequality: EQU (K-1)N+2.sup..alpha. -N.ltoreq.p+P-1.ltoreq.KN+2.sup..alpha. -N and in that it comprises multiplexers able to make these K registers recirculating N-1 times out of N and circulating 1 time out of N, these multiplexers being controlled by the outputs of the counter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.