Quasi-soft decision decoder for convolutional self-orthogonal codes
US4521886A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 1983 |
| Grant date | Jun 4, 1985 |
| Priority date | — |
| Expiry date | Jul 8, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/43
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a quasi-soft decision decoder for convolutional self-orthogonal codes which includes a multistage syndrome register, a bit detection means, parity check means and threshold logic gates. The bit detection means is augmented to render a "quality" bit in conjunction with each detected data bit which indicates the quality of the received signal level for that bit when compared with a predetermined threshold signal level. Memory storage is provided for storing the quality bits in parallel with memory storage for the data bits. Each of the threshold logic gates includes a separate group of active inputs from the syndrome register plus an associated one of the quality bits, each gate being arranged to generate an information correction bit which is dependent on a predetermined threshold level of corresponding input signals. The quality bit, therefore, provides an additional vote in the decision of whether a suspect data bit is erroneous or not.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.