Data transmission facility between two asynchronously controlled data processing systems with a buffer memory

US4525849A · kind A · utility

Assignee

• Siemens Aktiengesellschaft · DE

Inventor

• Gerhard Wolf · Mannheim, DE

Key dates

• Filing date: Mar 23, 1983
• Grant date: Jun 25, 1985
• Expiry date: Mar 23, 2003

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2205/123
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

In order to avoid unambiguous logic switching statuses in a data and control path upon transfer from one clock system of an outputting data processing system into an independent, asynchronous clock system of an accepting data processing system, and wherein a continuous data flow is to be guaranteed at the output of a buffer memory, a control signal indicating the presence of an intermediately stored data word is synchronized into a forwarding timing pattern of the accepting system via a synchronization circuit for forwarding data words from the buffer memory. A forwarding sync control signal is generated by the synchronization circuit. For controlling the in-flow into the buffer memory, a control signal dependent on the forwarding timing pattern of the accepting system is synchronized into the timing pattern of the outputting system over a further synchronization circuit. A request sync control signal is generated which respectively leads to the transfer of a data word together with a strobe signal to the buffer memory which undertakes the intermediate storage on the basis of the strobe signal. In order to guarantee a continuous data flow at the output of the buffer memory, the buf…