Patent · US Expired

Signal translator with supply voltage compensation particularly for use as interface between current tree logic and transistor-transistor logic

US4527078A · kind A · utility

9Cited by
3References
21Claims
0Family size

Assignee

Inventor

Key dates

Filing dateAug 23, 1982
Grant dateJul 2, 1985
Priority date
Expiry dateAug 23, 2002

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K19/00376
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A signal translator for converting an input voltage (V.sub.I) into an output voltage (V.sub.O) at a different level contains a primary element stack (10) and a similarly-configured image element stack (12), both coupled between the sources of a potentially first variable supply voltage (V.sub.CC) and a normally constant second supply voltage (V.sub.EE). A reference voltage (V.sub.R) is supplied to both a primary-stack transistor (Q2) which provides the output voltage and an image-stack transistor (Q4) which provides a feedback signal (V.sub.F). A feedback circuit (14) formed with an amplifier (16) and a shifting circuit (18) response to the feedback signal to supply the reference voltage at such a value as to compensate the output voltage for changes in the first supply relative to the second supply voltage is particularly useful for CTL-to-TTL logic.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.