Microcomputer system with bus control means for peripheral processing devices
US4528626A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 1984 |
| Grant date | Jul 9, 1985 |
| Priority date | — |
| Expiry date | Mar 19, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/285
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microcomputer system includes a main processor, a memory and a direct memory access controller (DMA) effective to control direct data transfer between the memory and input/output devices on channels. Bus control for data transfer is switchable between the DMA and processor by a hold request/acknowledge handshaking sequence between the DMA and processor. A control line from the channels is activated by a peripheral processing device on a channel when it wishes to gain control of the busses for data transfer. Logic means coact with the handshaking sequence to determine which device gains control of the busses. This logic is responsive to the DMA address enable output (AEN), the hold acknowledge output of the main processor (HLDA) and the channel control line output (-MASTER). When all these are deactivated, control passes to the main processor, when AEN and HLDA only are activated, control passes to the DMA controller and, when all three are activated, control passes to the peripheral processing device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.