Echo cancellation circuit using stored, derived error map
US4528676A · kind A · utility
8Cited by
3References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 14, 1982 |
| Grant date | Jul 9, 1985 |
| Priority date | — |
| Expiry date | Jun 14, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B3/231
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An automatic correction circuit is responsive to suitable bit patterns in a bit stream being received from a transmission medium, to generate an error amplitude map of signal distortion being introduced by the transmission medium. The error amplitude map is digitally stored or recorded. After each non zero bit occurrence in the signal stream a synchronized output signal corresponding to the recorded error amplitude map is generated and added to the bit stream being received to reduce signal distortion, whereby information recovery from the received bit stream is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.