DMA multimode transfer controls
US4530053A · kind A · utility
15Cited by
6References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 1983 |
| Grant date | Jul 16, 1985 |
| Priority date | — |
| Expiry date | Apr 14, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/282
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuitry is provided to be used in association with a single transfer mode DMAC device to enable a programmer to control the number of bytes transferred during a DMA transfer cycle. The circuitry receives a coded mode control message from the microprocessor before transferring control of the data and address busses to the DMAC and generates one or both of two data transfer strobe signals which instruct the memory to transfer contiguous bytes, contiguous high alternate order bytes, or contiguous low alternate order bytes, or both.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.