Circuit for preventing malfunction of muting amplifier
US4532482A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 13, 1983 |
| Grant date | Jul 30, 1985 |
| Priority date | — |
| Expiry date | May 13, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/305
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit for preventing malfunction of a muting amplifier is provided. The circuit of a muting amplifier is composed a semiconductor integrated circuit which comprises a first lateral p-n-p transistor to receive an input signal applied to the base thereof and one or more second lateral p-n-p transistors serving as a constant current source and performs an amplifying operation during the conduction of the second lateral p-n-p transistors or is placed in a muting mode during the cutoff thereof, the circuit configuration of this invention is such that a third p-n-p transistor is provided in the vicinity of the first lateral p-n-p transistor and is so connected as to turn on the second lateral p-n-p transistors during the conduction of the third p-n-p transistor, wherein, when the input signal level becomes lower than the minimum potential in the integrated circuit, the third transistor is turned on by an n-p-n transistor, which works as a parasitic transistor. Applying the current introduced by another parasitic p-n-p transistor in the direction reverse to the current caused by the foresaid parasitic n-p-n transistor can eliminate the disadvantage in the conventional circuit configur…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.