Device structures for high density integrated circuits
US4533934A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 2, 1980 |
| Grant date | Aug 6, 1985 |
| Priority date | — |
| Expiry date | Oct 2, 2000 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device structure incorporating the edge of silicon island as a surface for diffusing impurities is described to form the drain and source of an MOS transistor and interconnections therebetween to form semiconductor devices such as MOS transistors, variable threshold MNOS transistors, row decoders for use in memories, memory arrays, interconnect crossovers, and high-voltage transistors. A semiconductor process is described for fabricating the above devices utilizing four or five masks. The invention overcomes the problem of high-density integrated circuits by utilizing the edges of silicon islands on an insulating substrate as well as the upper surface of the islands. In addition, contact metallizations are non-critical because of the Schottky barrier diode formed between aluminum and n-type silicon. Both n and p-type semiconductor devices are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.