Trench etch process for dielectric isolation
US4534826A · kind A · utility
44Cited by
13References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 29, 1983 |
| Grant date | Aug 13, 1985 |
| Priority date | — |
| Expiry date | Dec 29, 2003 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/075
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for etching deep trenches to achieve dielectric isolation for integrated circuit devices; the process insures obtaining substantially perfectly vertical trench walls by precluding significant variation in etch bias during the trench formation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.