Control of serial memory
US4535427A · kind A · utility
35Cited by
2References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 6, 1982 |
| Grant date | Aug 13, 1985 |
| Priority date | — |
| Expiry date | Dec 6, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A FIFO memory chip includes read and write pointers in the form of an X and a Y shift register carrying a pair of pointer bits that point to a memory cell in a rectangular cell array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.