Field effect regulator with stable feedback loop
US4536699A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 16, 1984 |
| Grant date | Aug 20, 1985 |
| Priority date | — |
| Expiry date | Jan 16, 2004 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/571
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A low voltage series pass regulator configuration has an input terminal for receiving a predetermined input voltage and an output terminal operatively connected to a load. The regulator comprises at least one field effect transistor in a source follower configuration. The drain of the field effect transistor is operatively connected to the input terminal and the source is operatively connected to the output terminal which provides an output voltage across the load. In one embodiment of the present invention a current limiter is operatively connected between the source and a gate of the field effect transistor. In another embodiment of the present invention a comparator for comparing the output voltage to a first reference voltage is provided. The comparator supplies a control voltage, indicative of the value of the output voltage compared to the first reference voltage, to the gate of the field effect transistor. This output voltage is indicative of the current drawn by the load and causes the comparator to produce a control voltage on the gate which keeps the output voltage substantially constant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.