FM Stereo demodulating circuit
US4539697A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 1983 |
| Grant date | Sep 3, 1985 |
| Priority date | — |
| Expiry date | Sep 6, 2003 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/1646
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An FM stereo demodulating circuit comprising a pulse counter detector 1 for generating a pulse train signal including the frequency spectrum of the FM signal, DC biasing means for current biasing the detector output about a midpoint, a subcarrier signal generator 2 and current drivers 8, 10 for generating dual polarity biased subcarrier currents, first and second transistor pairs 3, 4, the emitters of each being connected to one of the current drivers, and the bases of the pairs being cross-connected to one of the biased detector outputs, at least one reference transistor pair whose emitters are connected to a current source 11 and whose collectors are connected to each of the biased detector outputs. The currents entering the cross-connected collectors of the first and second transistor pairs, when referenced against the currents into the emitters of the reference transistor pair, produce signals proportional to the right and left channels of the FM signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.