Semiconductor device and method for manufacturing the same
US4539742A · kind A · utility
17Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 1982 |
| Grant date | Sep 10, 1985 |
| Priority date | — |
| Expiry date | Jun 18, 2002 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device wherein collector connecting wiring made of for example n.sup.+ -type polycrystalline silicon layer is formed by an anisotropic etching which simultaneously engrave a groove in a semiconductor substrate. A collector layer is formed on a non-etched projection, while base contact hole is formed in the lower portion of the groove. Therefore, the base contact hole is not contacted with collector layer, thus preventing the flow of a leakage current and short-circuiting therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.