Data clocking circuitry for a scanning apparatus
US4541061A · kind A · utility
18Cited by
7References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 13, 1982 |
| Grant date | Sep 10, 1985 |
| Priority date | — |
| Expiry date | Oct 13, 2002 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06K15/1219
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Clocking circuitry for providing clocking signals in accordance with a preprogrammed sequence of rates. An addressable memory is included having data defining such rates with a voltage controlled oscillator (VCO) controlled via data from the addressable memory. An address producing means is controlled by the clocking signals of the VCO to provide an address signal for the memory in response to each clocking signal. The clocking circuitry is used with a moving mirror for a laser printer apparatus, the mirror having a known repetitive movement which is used in establishing the preprogrammed sequence of rates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.