Comparator circuit
US4542303A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 1983 |
| Grant date | Sep 17, 1985 |
| Priority date | — |
| Expiry date | Oct 3, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/16557
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
This relates to a comparator circuit for monitoring intelligence on a data bus, which circuit consumes no power until activated by a predetermined voltage on the data bus. An input PNP transistor has a base coupled to the data bus. An emitter resistor and a collector resistor may be scaled to achieve a desired switching threshold. A second PNP transistor has a base coupled to the bus and an emitter coupled to the collector of the first PNP transistor such that the second PNP transistor does not turn on until the first PNP transistor saturates. The collector of the second PNP transistor is coupled to the base of an output NPN transistor and supplies drive thereto when the second PNP transistor is on.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.