Tuning system with automatic frequency control
US4542533A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 27, 1984 |
| Grant date | Sep 17, 1985 |
| Priority date | — |
| Expiry date | Apr 27, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03J7/065
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A microprocessor controlled phase locked loop tuning system is disclosed which comprises a microprocessor (10) that provides frequency data to the PLL (11), this data controlling a programmable frequency divider in the PLL to determine the nominal frequency of a VCO (131) in a tuner (13). The AFC detector (141) in the intermediate frequency module (14) provides an error voltage output to the AFC comparator (15). The comparator produces a low or a high output to the microprocessor depending on whether the error voltage exceeds a second input voltage to the comparator. This second input voltage is an increasing voltage from a time constant network (16) controlled by the microprocessor. The microprocessor program includes a loop wherein the microprocessor alternately increments a register and reads the output of the comparator until the voltage from the time constant network exceeds the error voltage from the AFC detector. The value in the register is then proportional to the error voltage. This number is saved and used to alter the output to the PLL if required to correct the VCO frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.