Race condition mediator circuit
US4544850A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 5, 1983 |
| Grant date | Oct 1, 1985 |
| Priority date | — |
| Expiry date | Dec 5, 2003 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4226
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit which eliminates race conditions caused by gate delay variation. In the absence of gate delay variations data is made available for a period of time which extends beyond commencement of processing of such data. This circuit prevents gate delay variations from causing processing to commence after the period of time during which data is available. Each of a pair of flip-flops initiates or terminates the data available time period. These flip-flops, an exclusive-or gate and related circuitry are arranged such that the period of time for data availability is not terminated until after processing of such data actually commences.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.