NPN Transistor current mirror circuit
US4546307A · kind A · utility
6Cited by
3References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 3, 1984 |
| Grant date | Oct 8, 1985 |
| Priority date | — |
| Expiry date | Jan 3, 2004 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/343
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A current mirror using NPN transistors is described for use in PN junction isolated monolithic integrated circuits. A preferred embodiment operates at high accuracy over a wide range of output currents. It also operates at a relatively high signal frequency. An application in a charge pump, suitable for use in a digital phase locked loop, is detailed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.